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Senior Hardware Integration and Test Engineer

At Raytheon Applied Signal Technology the dynamic and diverse develop demanding, trusted, superior solutions to make the world a safer place, and we are looking for a senior hardware integration and test engineer for our Sunnyvale, California location to integrate, test, and maintain advanced high-capacity systems that process modern high-speed communications for the U.S. intelligence community.

You will work as a task lead and technical contributor on cutting-edge technology for RAST, which develops systems to provide integrated sensor and signal processing products in support of intelligence, surveillance and reconnaissance that protect your family, your nation, and enhance global security, while in your free time you can explore the many wonders of California. Raytheon offers robust reward and recognition programs in compensation, career development, health care, educational assistance, maternal and paternal leave, flexible work schedules, child/adult backup care,401(k), paid holidays, and paid time off.

You must have a solid background in the integration and test of digital hardware platforms; have a strong comprehension of integration and test lab environments; have a proven ability to define and perform system/component level integration and test plans; have a proven ability to identify, track, and resolve complex hardware integration and test issues in hands-on lab environments; have a working knowledge of automated test methods and technics; apply strong task planning and management skills to lead a team of engineers to execute integration and test plans to meet schedule, budget, and quality requirements; have strong communication skills; and use technical expertise to provide imaginative, thorough, practicable and organizationally aligned solutions to a wide range of difficult integration and test challenges.

Required Skills:
- Minimum of six years of experience in the integration and test of digital hardware platforms (CCA, FPGA, Mechanical, software).
- Proven ability to define, develop, and perform system/component level integration and test plans.
- Proven ability to identify, track, and resolve complex hardware integration and test issues in hands-on lab environments using standard lab test equipment.
- Good understanding of digital components.
- Working knowledge of automated test methods and technics (software, scripts, automated test tools).
- Experience providing reliable hardware integration and test cost and schedule estimates for integration and test activities Experience in leading a team of 1–5 engineers in the integration and test activities; includes planning, estimating, and managing execution to meet schedule and cost targets.
- Clear written and verbal communication skills Ability to work independently and collaboratively in team environments
- Ability to obtain a TS/SCI clearance

U.S. Citizenship status required as this position will need a U.S. Secret Security Clearance within 1 year of start date.

Desired Skills:
- Active TS/SCI within the last two years Familiarity with JTAG and I2C bus technologies (tools, programming, troubleshooting).
- Experience with operation and maintenance of network based hardware test platforms.
- Experience with mixed analog/digital hardware platforms.
- Experience with the transition of designs from Engineering to Manufacturing

Required Education:
Bachelor of Science, Electrical Engineering or equivalent

Desired Education:
Master of Science in Electrical Engineering or equivalent

This position requires a U.S. person or the ability to obtain an Export Authorization from the appropriate government agency for non-U.S. persons.


Raytheon is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, sex, sexual orientation, gender identity, national origin, disability, or protected Veteran status.

Company Name:
Security Clearance:
Top Secret / SCI
Sunnyvale, California
United States
Not Specified
Job Number:

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